NCS8803 HDMI-to-eDP w/ Scaler


--Embedded-DisplayPort (eDP) Output

1/2/4-lane eDP @ 1.62/2.7Gbps per lane

HD to WQXGA (2560*1600) supported

Up to 6dB pre-emphasis


--HDMI Input

HDMI 1.4a supported

RGB444/YCbCr444/YCbCr422 supported

Pixel clock up to 340MHz

2-channel audio supported

Adaptive equalization


--Reference Clock

Any freq. between 19MHz and 100MHz

Crystal or single-ended clock input

Built-in 5000ppm SSC generator


I2C for chip configuration

Built-in eDP handshake protocol

I2C-AUX channel for TCON/DPCD/EDID


Built-in video test pattern



1.2V core supply

2.5V or 3.3V IO supply

Power consumption ~ 150mW

@ 2560*1600*24bit*60Hz

Deep-sleep mode power <1mW



QFN-56 (7mm x 7mm) package

RoHS Compliant



Samples by the end of 2016

Block Diagram